Technology Focus and Domain Experience

Value add. Sound engineering design. Practical consideration. These are a few phrases that are consistently expressed during our design reviews. APG is recognized for our expertise in complex high- speed FPGA design and we know how to push the technology to achieve maximum performance and reliable operation.

Utilizing innovative architectures and the latest network technologies, Advanced Principles Group (APG) has created practical implementations of the following compute-intensive and real-time applications.

• HALCYON Reconfigurable Computing Board - APG designed a cPCI FPGA-based computational accelerator board for the U.S. Department of Energy, Los Alamos National Laboratory. The RCB (Reconfigurable Computing Board) will be used as a development platform for next-generation satellites designed for orbital detection of weapons of mass destruction.
• Fault-Tolerant Industrial Controller - APG performed a critical design review of a fault-tolerant industrial controller implemented in an Altera Acex FPGA. APG identified several critical design errors along with inadequate simulation test coverage. Many of the identified errors correlated with unpredictable/erratic behavior seen during lab testing. APG redesigned the controller to address problems with asynchronous logic, inadequately synchronized clock-domain transitions and incomplete and failed timing constraints. APG also supplied a new system testbench with an additional ~10,000 lines of VHDL code and ~12,000 lines of scripts.
• Long Code MUD FPGA - APG performed algorithm mapping, VHDL design and verification for the Long Code Multi-User Detection processor. The LCMUD FPGA provides interference mitigation for 3G wireless base stations. The ~5M gate design is implemented in a Xilinx XC2V6000 Virtex II FPGA and runs at 115 MHz. Our FPGA implementation of the MUD algorithm achieves a 40x speedup over an optimized 1 GHz PowerPC software implementation.
• Network Transport Engine (NTE) FPGA - APG performed specification, architecture, design and verification on this 1M Gate FPGA. The NTE FPGA provides low-latency two-level multicomputer communications between gigabit networks and a PCI-connected computational processor. A dedicated StrongARM microprocessor and a sophisticated multi-channel DMA controller with hardware packet acceleration, packet segmentation, and packet reassembly unloaded communication overhead from the computational processor.
• VCSEL Array Test Board - APG designed and developed a 150MHz DDR I/O test board for testing of an 8x8 VCSEL array. The FPGA contained pattern generators and checkers to exercise the VCSEL transceivers at high speed over long periods of time.
• Medical Imaging Convolution Processor - APG executed a detailed design study for implementing a 4k x 4k pixel, 16-bit grayscale medical imaging processor. The imaging processor included arbitrary scaling, a 9 x 9 convolution module and gamma correction.